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TDA7490L
15W + 15W STEREO CLASS-D AMPLIFIER 28W MONO IN BTL
15W + 15W OUTPUT POWER: RL = 8/4; THD = 10% HIGH EFFICIENCY WIDE SUPPLY VOLTAGE RANGE (FROM 10 TO 25V) SPLIT SUPPLY TURN OFF/ON POP FREE ST-BY AND MUTE FEATURES SHORT CIRCUIT PROTECTION ACROSS THE LOAD THERMAL OVERLOAD PROTECTION EXTERNALLY SINCHRONIZABLE BRIDGE CONFIGURATION
Flexiwatt 25 ORDERING NUMBER: TDA7490L
DESCRIPTION The TDA7490L is a dual audio class D amplifier assembled in Flexiwatt 25 package; it is specially designed for high efficiency application mainly for TV and Home Stereo sets.
Figure 1. Test and application circuit. (Stereo Configuration)
R1 10K +VCC
R17 52.3K -VCC +VCC
MUTE
STBY
R2 30K C27 2.2F 6
R21 4.7K
C26 470pF C25 470pF R20 68K 7 9
R3 10K
R4 130K
C23 2200F 14 2
C22 100nF 4
C21 2200F
-VCC R15 100
C1 330nF INPUT1 C2 1nF
10
G=2.5
PWM-stage1 INTEGRATOR1
5
C20 33nF C18 330pF
C19 560pF L1 30
OUT1 C10 220nF
PREAMPLIFIER1 12
3
C3 100nF C4 100nF R1 10K -VCC C7 100nF -VCC R 6.8 C5 330nF INPUT2 C6 1nF
11 R14 22K OSC 8 C17 24pF 15 C16 330pF R13 10K EXT_CK
13
16
1
25 PREAMPLIFIER2 18
G=2.5
INTEGRATOR2 PWM-stage2 20 24 22
23
R12 22K C14 33nF
L2 30 C15 560pF R11 100 -VCC
OUT2 C29 220nF
21
19 R5 4.7K C8 470pF R6 68K
17
C9 470pF
C28 2200F -VCC R9 52.3K
C11 100nF
C12 2200F +VCC
D98AU978A
March 2001
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TDA7490L
Figure 2. Test and application circuit. (Bridge Configuration)
470pF 470pF R5 52.3K
C40
R4 68K
C41
The LC filter is optimized for 8 (<->LC filter for 4 in single-ended) It hos to be changed for other loads 9
7
PRE +
L9 30 Int. PWM-stage 3 C23 235nF C26 470nF R27 10 R28 10 C29 470nF dumping (common mode)
INPUT
10
R63 4.7K
R25 Rload
C24 235nF 18
PRE + -
Int.
PWM-stage
23 L10 30
19 470pF
17 470pF
C60 R61 68K
C59 R62 52.3K
D99AU1081
ABSOLUTE MAXIMUM RATINGS
Symbol VCC Ptot Tstg, Tj Top V6,8,10,18 Parameter DC Supply Voltage (no signal) Power Dissipation Tcase = 70C Storage and Junction Temperature Operating Temperature Range Maximum Voltage on pins # 6,8,10,18 referred to GND Value 30 35 -40 to 150 0 to 70 5 Unit V W C C V
THERMAL DATA
Symbol Rth j-case Parameter Thermal Resistance Junction-case Typ. 1 Max. Unit C/W
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TDA7490L
PIN CONNECTION (Top view)
1
25
BOOT1
STBY-MUTE
OUT1
OUT2
-VCC
-VCC
+VCC
CURREF
PIN FUNCTIONS
N. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Name -VCC sign/sub -VCCpow1 out 1 +VCCpow1 BOOT1 STBY-MUTE FEED1 OSC FEED2 IN1 T1 +5V GND CURREF T2 -5V FEED3 IN2 FEED4 NC BOOT2 +VCCpow2 OUT2 -VCCpow2 Vreg Function Negative signal/substrate supply Negative power supply CH1 PWM output of CH1 Positive power supply CH1 Bootstrap CH1 Control State Pin Feedback pin 1 CH1 Master Oscillator Setting Freequency Pin (or external sync.) Feedback pin2 CH1 Input CH1 Triangular waveform CH1 +5V regulator (only for internal purposes) Signal ground Setting current resistor Triangular waveform CH2 -5V regulator (only for internal purposes) Feedback pin1 CH2 Input CH2 Feedback pin2 CH2 Not connected Bootstrap CH2 Positive power supply CH2 PWM output of CH2 Negative power supply CH2 10V regulator
BOOT2
FEED1
FEED2
FEED3
FEED4
D97AU816B
+VCC
GND
-VCC
OSC
Vreg
IN1
T1
T2
IN2
N.C.
+5V
-5V
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TDA7490L
ELECTRICAL CHARACTERISTICS (Refer to the test circuit, VCC = 17V; RL = 8; Demod. filter L = 30mH, C = 220nF; f = 1KHz; fsw = 200kHz; Tamb = 25`C unless otherwise specified.)
Symbol VS Iq VOS PO PO(BTL) Parameter Supply Range Total Quiescent Current Output Offset Voltage Output Power Output Power in Bridge Configuration THD = 10% THD = 1% Vs =17V; RL = 16 THD = 10% THD = 1% Vs =13V; RL = 8 THD = 10% THD = 1% PO (1) Output Power RL = 4 VCC = 13V THD = 10% THD = 1% VCC = 17V; RL = 8 PO = 15W + 15W; THD = 10% PO = 15W + 15W RL = 8; PO = 1W RL = 0 3.5 RL = no LC filter -150 12 10 15 12 28 22.5 28 22.5 15 12 4 86 0.1 5 150 29 -1 A Curve f = 20Hz to 22KHz f = 1KHz, PO = 1W 20 f = 100Hz; Vr = 0.5 7 12 55 30 60 55 50 0.4 100 0 1.7 4 55 60 3 5 200 60 70 0.8 230 0.7 2.5 5 30 31 +1 Test Condition Min. 10 70 Typ. Max. 25 120 +150 Unit V mA mV W W W W W W W W W % % A C dB dB V V dB k dB V ns KHz V V V dB mA
PD THD Imax Tj GV GV (3) eN CT Ri SVR Vrmax Tr, Tf RDSON FSW (4) VST-BY VMUTE VPLAY AMUTE IqST-BY
Maximum Dissipated Power Efficiency (*) Total Harmonic Distortion Overcurrent Protection Threshold Thermal Shut-down Junction Temperature Closed Loop Gain Gain Matching Total Input Noise RG = 50 Cross talk Input Resistance Supply Voltage Rejection Overvoltage Threshold (5) Rising and Falling Time Power Transistor on Resistance Switching Frequency Range
MUTE & STAND-BY FUNCTIONS Stand-by range Mute Range Play Range Mute Attenuation Quiescent Current @ Stand-by
*: PO = measured across the load using the following inductor: COIL58120 MPPA 2 (magnectics) TURNS = 20 o 1mm (1) L = 15H, C = 470nF (3) Gv is intended with R2, R17, R5, R9 1% precision (4) FSW = 0.25 (1/(300ns + R13 ( C17 + 76pF) 0.85) (5) VRMAX = (+VCC) - (-VCC) when VR VRMAX the device goes in Stand-By mode
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TDA7490L
Figure 3. P.C. Board and component layout of the Figs. 1, 2. (for Stereo and Bridge compatible configuration)
C O M P O N E N T S I D E
S O L D E R S I D E
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TDA7490L
Figure 4. Distortion vs. Output Power
THD (%) 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 0 2 4 6 8 10 12 14 PO(W) Stereo VS 17V; Rl=8; f=1KHz
D99AU1086
Figure 5. Distortion vs. Output Power
THD (%) 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 0 2 4 6 8 10 12 14 PO(W) Stereo VS 13V; Rl=4; f=1KHz
D99AU1084
Figure 6. Crosstalk vs. Frequency
CT (dB) -20 -30 -40 -50 -60 -70 -80 -90 -100 0.001 VS 17V; Rl=8; 0dB=1W
D99AU1102
Figure 7. Frequency Response
AMP (dB) 2 0 -2 -4 -6 -8 -10 -12 -14 0.01 VS= 17V; Rl= 8; 0dB= 1W
D99AU1103
0.01
0.1
1
f(KHz)
0.1
1
10
f(KHz)
Figure 8. Power Dissipation vs. Output Power
Ptot (W) 7 6 5 4 VS= 17V; Rl= 8; f= 1KHz
D99AU1087
Figure 9. Distortion vs. Output Power in BTL
THD (%) 5 2 1 0.5 0.2
D99AU1104
Bridge VS 13V; Rl=8; f=1KHz
3
0.1
2 1 0 0 2 4 6 8 10 12 14 PO(W)
0.05 0.02 0.01 0 5 10 15 20 25 PO(W)
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TDA7490L
Figure 10. Distortion vs. Output Power in BTL
D99AU1105
THD (%) 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 0 5
Bridge VS 17V; Rl=16; f=1KHz
10
15
20
25
PO(W)
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TDA7490L
DIM. A B C D E F (1) G G1 H (2) H1 H2 H3 L (2) L1 L2 (2) L3 L4 L5 M M1 N O R R1 R2 R3 R4 V V1 V2 V3 MIN. 4.45 1.80 0.75 0.37 0.80 23.75 28.90 mm TYP. 4.50 1.90 1.40 0.90 0.39 1.00 24.00 29.23 17.00 12.80 0.80 22.47 18.97 15.70 7.85 5 3.5 4.00 4.00 2.20 2 1.70 0.5 0.3 1.25 0.50 MAX. 4.65 2.00 1.05 0.42 0.57 1.20 24.25 29.30 MIN. 0.175 0.070 0.029 0.014 0.031 0.935 1.138 inch TYP. 0.177 0.074 0.055 0.035 0.015 0.040 0.945 1.150 0.669 0.503 0.031 0.884 0.747 0.618 0.309 0.197 0.138 0.157 0.157 0.086 0.079 0.067 0.02 0.12 0.049 0.019 MAX. 0.183 0.079 0.041 0.016 0.022 0.047 0.955 1.153
OUTLINE AND MECHANICAL DATA
22.07 18.57 15.50 7.70
22.87 19.37 15.90 7.95
0.869 0.731 0.610 0.303
0.904 0.762 0.626 0.313
3.70 3.60
4.30 4.40
0.145 0.142
0.169 0.173
5 (Typ.) 3 (Typ.) 20 (Typ.) 45 (Typ.)
Flexiwatt25
(1): dam-bar protusion not included (2): molding protusion included
V3 H3
H H1 H2 R3 R4 V1 R2 R L L1 A
L4
O
L2
N
L3
V1
V2
R2 L5 G V B C V
FLEX25ME
R1 R1 R1 E
D
G1
F M M1
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TDA7490L
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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